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ACTA AERONAUTICAET ASTRONAUTICA SINICA ›› 1993, Vol. 14 ›› Issue (4): 169-174.

• 论文 • Previous Articles     Next Articles

SCFT:A TMR-BITE FAULT-TOLERANT COMPUTER SYSTEM BASED UPON 16-BIT SINGLE-CHIP MICROCOMPUTERS

Huang Feng-ying, Ji Gen-lin, Li Zhen, Zhuang yi   

  1. Department of computer Science and Engineering Nanjing Aeronautical Institute, Nanijing,710072
  • Received:1990-12-30 Revised:1991-05-30 Online:1993-04-25 Published:1993-04-25

Abstract: t This paper presents a TMR-BITE (Triple Modular Redundant-Buitt-in Test Equipment, also referred to as TMR-Duplex-Simplex) fault-tolerant computer system based upon 16-bit single-chip microcomputers (SCFT). The system has an ability of fault detection and recovery, a gradually degrading function and a high reliablity. It imposes little overhead time on the voting process. It can be used for aerospace techniques, flight control systems and automatic control systems. What is described in this paper is the hardware structure of SCFT which includes the voter structure, the communication mode, the communication interface, the synchronization technique, etc.

Key words: reliability, fualt-tolerance, voter, multiprocessor, synchronous, TMR, communication