航空学报 > 2014, Vol. 35 Issue (12): 3392-3402   doi: 10.7527/S1000-6893.2014.0038

基于可靠性优化的芯片自愈型硬件细胞阵列布局方法

张砦, 王友仁   

  1. 南京航空航天大学 自动化学院, 江苏 南京 210016
  • 收稿日期:2014-01-06 修回日期:2014-04-03 出版日期:2014-12-25 发布日期:2014-04-10
  • 通讯作者: 张砦 男, 博士, 讲师.主要研究方向:仿生硬件自修复、可重构电子系统设计. Tel: 025-84892352 E-mail: wolnyzhang@nuaa.edu.cn E-mail:wolnyzhang@nuaa.edu.cn
  • 作者简介:王友仁 男, 博士, 教授, 博士生导师.主要研究方向: 可重构硬件设计、电子系统健康监测与故障诊断. E-mail: wangyrac@nuaa.edu.cn
  • 基金资助:

    国家自然科学基金(61202001)

Method to Reliability Improvement of Chip Self-healing Hardware by Array Layout Reformation

ZHANG Zhai, WANG Youren   

  1. College of Automation Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing 210016, China
  • Received:2014-01-06 Revised:2014-04-03 Online:2014-12-25 Published:2014-04-10
  • Supported by:

    National Natural Science Foundation of China (61202001)

摘要:

以提高可靠性为目标,研究芯片自愈型硬件细胞阵列布局的新结构和新方法.针对传统可靠性模型无法体现细胞内部模块随布局结构动态变化的不足,通过细胞单元电路资源消耗分析,面向二维阵列结构进行了新的可靠性建模.根据新模型,在分析布局结构参数对可靠性影响程度的基础上,提出了一种先分块再分层的细胞布局新结构.用实例验证了新布局结构对可靠性提高的有效性,给出了不同设计任务和细胞电路设计方法情况下确定最佳布局方式的计算方法,并总结出了新布局结构中分块、分层参数选择规律,最终论证了最佳布局方式计算方法和参数选择规律的一般适用性.

关键词: 芯片自愈型硬件, 可靠性, 细胞阵列, 布局结构优化, 可重构, 设计准则

Abstract:

For the purpose of improving reliability, a new structure and some new methods are raised in this article by array layout reformation. The traditional reliability model assumes that all cells are treated as fixed nodes, which is inconsistent with the implementation process. Actually, the inner modules of cell should always change with the layout of cellular array dynamically. The new reliability model is proposed after the detailed analysis of unit circuit resource consumption on two-dimensional array. The influence of layout parameters is analyzed in detail. Furthermore, block and hierarchical structure is proposed. The effectiveness to improve the reliability is demonstrated based on a case study. As a conclusion, designers can get the optimal layout conformation with different cell circuit situations and design modus. The parameter selection rules of block and hierarchical structure are summed up, and the general applicability of the methods, which are used to calculate the best layout structure are validated finally.

Key words: chip self-healing hardware, reliability, cellular array, layout structure optimization, reconfigurable, design guidelines

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